1. Field of the Invention
The present invention relates to an overlay measuring method in manufacturing a semiconductor integrated circuit, and more particularly to a method of measuring an overlay error of a photo-resist pattern which is formed in a photo-lithography process to a lower layer pattern.
2. Description of Related Art
FIGS. 1A to 1C are diagrams illustrating a conventional method of measuring an overlay error of a photo-resist pattern 11 to a lower layer pattern 12-1. FIG. 1A is a cross sectional view of a portion of a semiconductor integrated circuit in which the photo-resist pattern 11 is formed on a lower layer pattern 12-1. FIG. 1B is a diagram illustrating an optical image of the semiconductor integrated circuit portion and FIG. 1C is a diagram indicative of an image signal along a line A-A' of the optical image shown in FIG. 1B. In this example, the cross sectional shape of the lower layer pattern 12-1 is symmetrical.
In the conventional overlay measuring method, in a case where the semiconductor integrated circuit has the structure composed of the photo-resist pattern 11 and a lower layer pattern 12-1 in a photo-lithography process during manufacture of the semiconductor integrated circuit as shown in FIG. 1A, the image signal along the line A-A' of the optical image shown in FIG. 1B is extracted as shown in FIG. 1C. Because the contrast is dull at the edge positions of the lower layer pattern 12-2 and the edge portions of the photo-resist pattern 11, the image signal which is extracted in this way has four recess portions corresponding to the respective edges portions, as shown in FIG. 1C. The distances between the pattern edges can be determined from the positions of these recess portions.
In the case of FIG. 1A in which the lower layer pattern 12-1 is symmetrical, suppose that a distance between the edge on the left side of the lower layer pattern 12-1 and the edge on the left side of the photo-resist pattern 11 is "L1" and a distance between the edge on the right side of the photo-resist pattern 11 and the edge on the right side of the lower layer pattern 12-1 is "M1", as shown in FIG. 1C, the overlay error "G" of the photo-resist pattern 11 to the lower layer pattern 12-1 can be represented by the following equation (1). EQU G=(L1-M1)/2 (1)
By the way, in the conventional overlay measuring method, the edge positions are calculated using algorithms such as a "least squares method", a "threshold method", and a "steep point method". Referring to FIG. 3A, the "least squares method" is a method in which each of the recess portions of the image signal is approximated by a secondary curve, and a position having a minimal value in the secondary curve is set as a "recess portion". Thus, the position is defined as the edge position, as shown in FIG. 3A.
The "threshold method" is a method in which after the difference between the maximum value and minimum value of the image signal is set to be "1", the image signal is sliced with a line having a predetermined ratio from the minimum value. The intersection points of the image signal and the line are defined as the edge positions, as shown in FIG. 3B.
The "steep point method" is a method in which primary differentiation is performed to the image signal and then the position having the maximum value in one recess portion and the position having the minimum value in another recess portion are defined as the edge positions, as shown in FIG. 3C.
All the above algorithms are devised that the overlay pattern is symmetrical. Therefore, if a symmetrical pattern is measured such as the photo-resist pattern and the pattern when a film is formed in a diffusion furnace, the correct measurement with less error can be performed.
However, if an asymmetrical pattern is measured such as a pattern when a film is formed by a sputtering apparatus, a shift component to either of a left direction and a right direction is superposed on the measuring result so that the measurement error becomes large. Thus, there is a problem in that it becomes not possible to perform an exact overlay measurement.
In this manner, in the conventional overlay measuring method, there is the problem that the measurement error becomes large in the overlay measurement, depending on the forming process of the lower layer pattern. This is because the image signal is also asymmetric at the edge sections on the left and right sides when the lower layer pattern is asymmetric in shape. As the result of this, in the method of calculating the edge positions using one of the above conventional algorithms, the shift component is superposed on the left or right side depending on an asymmetric extent.
The problems of the above conventional overlay measuring method will be further described with reference to FIGS. 2A to 2C. FIGS. 2A to 2C are diagrams illustrating the method of measuring an overlay error of the photo-resist pattern to the lower layer pattern when the lower layer pattern has asymmetric edge portions. FIG. 2A is a cross sectional view of such a semiconductor integrated circuit device in which a photo-resist pattern 11 is formed on a lower layer pattern 12-2, FIG. 2B is an optical image of the semiconductor integrated circuit device, and FIG. 2C is a diagram indicative of an image signal along a line B-B'.
As shown in FIG. 2A, the shape of the lower layer pattern 12-2 has asymmetric left and right edge portions. For this reason, both of the optical image and the image signal have also asymmetric left and right edge portions, as shown in FIGS. 2B and 2C. As a result, a measurement error is generated compared to the above case of FIGS. 1A to 1C in which the lower layer pattern 12-2 has a symmetrical shape at the left and right edge portions. In FIG. 2C, L2 indicates a distance between the edge on the left side of the lower layer pattern 12-2 and the edge on the left side of the photo-resist pattern 11 and M2 indicates a distance between the edge on the right side of the photo-resist pattern 11 and the edge on the right side of the lower layer pattern 12-2.